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Flip-Flops Unraveled


      No, these flip-flops aren't the ones you wear on the beach. These flip-flops are sequential circuits (circuits whose outputs are dependent on the previous values, like a sequence - hence the name). They're made up of combinational circuits strategically pieced together so that as long as there is a power supply, their outputs follow a sequence based on past inputs. Why would we need such a circuit? Why can't we just directly feed the values we desire by using the combinational circuits that we know? Well, there are instances that we don't want immediately fed values to affect the overall output.

      Take for example a security system. There are pressure transducers randomly placed all over the floor of a vault. When pressure is applied on the floor, like the weight of an adult, a voltage results and that voltage triggers a red light at a remote security facility. Now, let us say George Clooney and Brad Pitt manages to get inside the vault. While they walk across the vault to grab millions of dollars as a plot of revenge against another unknown Ocean's Fourteen antagonist, the red bulb at the remote facility lights up and an alarm goes off at the bank. Unfortunately, as luck always appears to be on the Ocean's side, the guard on duty was on a coffee break and when George and Brad have stepped out of the vault, the red light went out and the alarm at the bank stopped. Why? Because there is no longer any pressure on the floor of the vault. No pressure, no voltage. No voltage means nothing to drive the red light or the alarm. When the guard gets back on his post on the remote security facility, he wouldn't even know that the red light went on. Isn't that an inconvenience? Wouldn't we want the red light to still be on until it is manually turned off? That is where flip-flops come in.

     The problem above can be solved by using one simple flip-flop, the SR flip-flop. SR stands for Set/Reset. Yes, 2 input terminals, set and reset, whose names serve their function and 2 output terminals Q and Q'. We can feed the pressure transducer output to the "set" input terminal of the SR flip-flop, thus "setting" the present value to 1. If S=1, and R=0, then the next value of output terminal Q will be 1. We can feed Q to the red light. Now, when Mr. Clooney and Mr. Pitt step off the vault, S becomes 0. An SR flip-flop will have its output terminal Q = 1 as long as R "reset" = 0. Therefore, even if S "set" = 0, the red light will still be on for the guard to find and the alarm in the bank will continue to ring as long as R = 0. (Q' is simply the inverse logic level of Q)

     You may wonder, what happens when both S and R are 1? Then there will be a race and Q will change between 0 and 1 so fast the value becomes indeterminate. A JK flip-flop is EXACTLY like an SR flip-flop except that when both S and R are 1, Q toggles between 0 and 1 at an observable pace. You now have a logic oscillator. JK means Jump/Kick, but my source for this fact is a bit obscure so you might want to double check with Mister Google. JK flip-flops can be used as a ripple counter by connecting Q to the clocking of the flip-flop. Oops, I almost forgot the clock and how it can influence the way a flip-flop is triggered.


The Clock and The Trigger


     There are 2 ways to trigger a flip-flop, the first being level triggering and the second, edge triggering. Both ways are further subdivided into two, being the positive and negative ways you can trigger them. A positive level triggered flip-flop can only change state, even if the inputs and previous outputs are at the right conditions, when it detects a positive logic level at its clocking input terminal. A negative level triggered flip-flop can only change state when it detects a negative logic level at its clocking input terminal. Level triggering isn't very popular since noise can easily pass up as a logic level and erroneously trigger the flip-flop. Postive-edge triggering is when the clocking input terminal detects a change from a negative logic level to a positive logic level. And vice versa for negative-edge triggering. This kind of triggering is usually preferred since noise can rarely pass up as an instantaneous change in treshold voltage that determines the two logic levels.


     Why do we need a clock to trigger a flip-flop? One reason could be synchroneity. We may want the flip-flop to change in sync with other flip-flops. This, in fact, is very important when flip-flops are applied in microprocessor systems. For example, your CPU executes an instruction that fetches data from the internal memory/secondary memory to be stored in a register, say register A, then transferred to another register B. Then, with the next instruction, you desire to transfer the contents of the Accumulator to A. If the flip-flops working in the buffer register of the Accumulator are clocked at a higher frequency with respect to the flip-flops in register A, then there is a chance that the contents of register A becomes overriden with the contents of the Accumulator before they get transferred to register B (its only a chance since tri-state buffers can be implemented at the register-to-bus interfaces). Of course, things can get more disastrous if the clocking of flip-flops at the instruction decoder are not in sync with the ones in the registers.


     Note: Outputs of a flip-flop are determined by the previous state of the output and the present state of the input. These "states", previous and present, differ by 1 clock cycle for edge triggering and 1/2 clock cycle for level triggering. With our Ocean's Fourteen example above, the clock of the SR flip-flop should be fast enough to "sense" or be triggered by the input from the pressure transducer, which is easily supplied by a free-running multivibrator (XR2206 IC with clipper circuit or a 555 IC can do the job if I remember it right).



The D and the T flip-flops (single input flip-flops for simple functions)

     The D flip-flop is like a simple buffer amplifier that memorizes any input that appears in its input terminal. If the input is a 1 then the output at the next clock cycle is a 1 until the input changes. If the input is a 0 then the output at the next clock cycle is a 0 until the input changes.

     The T flip-flop or Toggle flip-flop, as the name implies "Toggles" between a 0 and a 1. But can't a JK flip-flop do that? Yes indeed. In fact, if you short the two inputs of a JK flip-flop, you get a T flip-flop (remember that when J and K are 1, the output Q toggles). (The D flip-flop can also be constructed from the JK flip-flop, though the relation is not directly obvious. When you connect the 2 inputs, this time using an inverter to connect to the K terminal, it is like turning the reset (K) button on when J is off, therefore, making the low logic level appear at Q and vice versa.)

     That is all I know about flip-flops. Below are images I captured while experimenting with a logic circuit designer software.

     The circles enclosed with boxes are buttons. A green button is a pressed button, while a red button is an unpressed button. The circles are LEDs, that are yellow when lighted up and black otherwise. Notice that the nodes on the gates are colored red when negative logic is applied and blue when positive logic is applied.









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