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An Amateur’s View on the P2: Slew Rate and the Oscillator [Part 2]

In part 1, the basics of the P2 have been discussed through easy straightforward simulations in LTSPice. In this article, we delve further into the P2’s design. It hasn’t been easy investigating the nature of the P2, and below I share a realization I had while exploring this old operational amplifier.

“In my quest to understand the P2, I took a journey towards my inner self. Not being able to afford a trip to Kathmandu, I simply meditated in front of the test bench with all instruments turned on. After hours of humming [mostly from the step-down transformers in the power supplies] and pensive silence, I hit an epiphany. My arrogance and narcissism has led me to live a life of self-centeredness. But at the bottom of it all, it wasn’t really all about me, it’s all about the P2. In order to fully grasp the concept of the P2, I must feel the P2, act like the P2, become the P2!
I rejoiced over my realization. With newfound strength, I set the SMU to “Pulse” mode, held the terminals with both hands, and imagined I was functioning as a comparator. A few moments later my head started bobbing up and down.”

Note: Before you report the author to a mental institution, please do read the remainder of this article. I believe you may get something useful out of it.

Tomfoolery aside, there are a lot of things I’ve learned about the P2 while messing with it in LTSpice. I don’t regularly use LTSpice because I feel more attuned to the Virtuoso interface [heck, the “F” keys are barely used in its schematic editor]. Though I think Multisim GUIs are the most comfortable [my personal adventures aren’t that exacting]. Of course, LTSpice is free so it’s outrageous to expect the GUI to compete against Cadence.

Below is the oscillator [redrawn] used by the P2.

Figure 1 The P2 oscillator redrawn in LTSPice.

The rails are at 15V courtesy of the external supplies. A 3rd party model is defined using a SPICE directive, i.e. PNP 2N274. I am unsure of the AC current source’s function, removing it only delayed oscillation. Simulating this region of the circuit yields the waveform below.

Figure 2 Simulation result of Figure 1. Vout is at at node L1.

At steady state, the frequency stabilizes to 8.85 MHz.

Figure 3 Frequency measurement at steady state.

Is it possible to estimate this frequency without simulation? I know that the tank circuit is providing the oscillation through the flywheel effect, and it will resonate when the capacitive reactance seen on the left side of the circuit becomes equal to the inductive reactance seen on the right side, i.e. the loading effect is minimal. So, 1/(2*pi*f*C) = 2*pi*f*L. Solving for the frequency “f” yields 1/(2*pi*sqrt(L*C). The inductance is simply 1µH. The capacitance is 150pF // 21.43 pF // 200 pF. Plugging in the values returns a frequency a little off from expected - 8.3 MHz. Maybe there is a 0.55 MHz discrepancy due to the neglected capacitive load introduced by the other components. At least we have a theoretical estimate.

When C1 is removed, the circuit no longer oscillates. Perhaps without the capacitor, there is nothing to drive the transistor of Q1. At t=0, the base terminal of Q1 is near ground potential, 37.43 mV. The emitter terminal is at 0.4468V. Q1’s threshold voltage is 0.75V, so 0.40937V isn’t enough to trigger Q1. Therefore, Q1 is off. Vce of Q1 is at 9.3V. There is a 4.6V drop at R3 and a smaller drop of 1.4V at R2 [since R3>R2]. The rest of the nodes are at ground potential or at high impedance. Over time, the base voltage will start oscillating [due to a progressive charge/discharge cycle caused by a “push-pull” effect on one side of the capacitor plates] until Vbe is enough to saturate Q1 again and again. Consequently, the collector terminal will go from its negative rail up to Q1’s emitter voltage. Hence, the oscillation.  Also, at frequencies above 1.6kHz, the impedance of C1 becomes small, and the 10kΩ resistor isn’t seen by the 8.85 MHz signal.

When C2 is removed, the amplitude of the signal increases. At high frequencies, the DC resistance seen at the negative terminal is 3.3kΩ. Without the capacitor, the resistance will be higher at the upper end of the spectrum, resulting in a higher voltage.

R4 plays a crucial role as well. When the capacitors are discharged, the voltage bleeds through R4. Without R4, there is no discharge path and the capacitors will retain a permanent offset that will not satisfy the requirement for oscillation.

When C5 is replaced with a short, or when its capacitance exceeds the range from 6pF to 40pF, the waveform becomes distorted/attenuated [does anyone know why?].

Inductors L1 and L2 control the frequency of oscillation. The circuit can oscillate up to an inductance of around 5mH, and beyond that oscillation stops.

The most interesting component is C6. When the capacitance of C6 is lowered, the amplitude of the oscillation increases and vice versa. But below 25pF and above 1uF oscillation stops. So, the gain of the oscillator is controlled by this capacitor. Also, the waveform has a phase shift when C6 is varied.

Hold on a sec. If we connect a shunt variable capacitor to C6, we can create an oscillator with adjustable gain and phase. And we can make that gain and phase shift proportional to an input signal, “modulating” it. Apparently, this is what the P2 did, using a diode bridge as a mixer for the 8.85MHz sinusoidal output of the oscillator and whatever input you feed to its terminals.

Gee, that was fun! Even though the analysis above isn’t 100% full-proof, we have a firmer grasp on how the P2 works.

Now, to test the slew rate response of the P2.

Figure 4. The P2 inverting amplifier configuration.

As the rise and fall times of V2 are decreased, the Gibbs phenomenon becomes more pronounced at the output [see below encircled in red]. Eventually, no matter how fast the rise and fall edges are, the output will be limited to 0.0282 V/µs.

Figure 5 Simulation result of the schematic in Figure 4.

When the amplitude of the pulse exceeds 1V, the P2 no longer works as an inverting amplifier. I am unsure why this happens but maybe a parameter inside the circuit of the P2 has to be adjusted in order for it to work properly.

I’ve also read a few slew rate enhancement techniques, like using a slew-rate monitor usw., but whether they will work with the P2 circuit or not is a different story.

So, that is all for this part of the series. LTSpice and the P2 schematic are both free to the public so why not give them a try? Please do share any “Eureka!” moments you may have while tinkering with the circuit.


  1. The AC source provides a single cycle of a 5MHz sinewave, presumably to kickstart oscillation.
    C1 is the emitter bypass capacitor that ensures the base-emitter junction of Q1 at AC sees the full signal at the base, rather than said signal being divided over the base-emitter junction and R1. The emitter resistor, together with R4 establish the bias point.

    C3 and C5 are DC blocking capacitors, so that the windings of the transformer (L1 and L2), which have a DC impedance of 0, do not upset the bias. I believe C5 also forms a capacitive divider with C4, so that only a fraction of the tank signal is applied to the base of Q1.

    C2 and R2 form a simple low pass RC filter, to provide a clean supply voltage for the oscillator circuit. This prevents "junk" from the power supply from coupling into the oscillator circuit, and perhaps more importantly, the oscillator signal from bleeding into the supply rail of other parts of the circuit.

    I'm fairly certain C6 affects the output swing of the oscillator due to its influence on the LC tank's Q factor.

    1. Hi Unknown, thanks for the feedback.
      But there was still oscillation when I removed the 5MHz sine wave, it was delayed though.
      Yeaaahhh... C3 and C5 are DC blocking capacitors! Failed to mention that.
      Thanks a lot!


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